Unit 1: Introduction to Microprocessor [3 Hours]
This unit lays the foundation for everything else in the subject. It breaks the microprocessor down into its building blocks (registers, ALU, control unit), explains how the three system buses let it talk to memory and I/O, and shows where microprocessors actually get used. Nearly every topic here is exam-favorite material, especially the bus classification.
1.1 Definition of Microprocessor
Core Definition
A microprocessor is a single integrated circuit (IC), fabricated using LSI/VLSI technology, that contains the arithmetic and logic unit, control unit, and a set of registers, and is capable of fetching, decoding, and executing instructions stored in memory to perform arithmetic, logical, and control operations.
In plain words, a microprocessor is the "brain" of a computer squeezed onto one chip. It reads instructions one at a time from memory, figures out what each one wants done, and then does it — whether that means adding two numbers or switching a signal on.
Detailed Explanation
A few things make this definition important for exams:
- It is a single chip → before microprocessors existed, CPU functions were spread across many separate ICs, making systems bulky and expensive.
- It cannot work in isolation → it needs external memory (to hold programs and data) and I/O devices (to interact with the outside world), connected through buses (see 1.5 and 1.6).
- It is programmable → its behaviour is decided by the sequence of instructions (software) stored in memory, not by fixed wiring. This is exactly what makes it general-purpose instead of a single-task circuit.
Common Mistake
Students often use "microprocessor" and "microcontroller" interchangeably. A microprocessor has only the CPU (ALU + control unit + registers) on one chip and needs external memory and I/O. A microcontroller integrates the CPU along with memory and I/O peripherals on the same chip, built for dedicated embedded tasks.
Summary
- A microprocessor is a single-chip CPU containing ALU, control unit, and registers.
- It performs arithmetic, logical, and control operations based on stored instructions.
- It needs external memory and I/O to form a working system.
One-Liner Revision
Microprocessor = ALU + Control Unit + Registers, on one chip, executing stored instructions.
1.2 Registers
Core Definition
Registers are small, high-speed storage locations built inside the microprocessor itself, used to hold data, addresses, or status information temporarily during instruction execution.
Think of registers as the microprocessor's scratchpad — tiny notebooks sitting right next to where the actual calculation happens, so the CPU doesn't have to reach all the way out to slow main memory for every small piece of data.
Detailed Explanation
- Because registers sit inside the CPU, accessing them is far faster than accessing RAM → this is what keeps instruction execution quick.
- The number and width of registers (8-bit, 16-bit, 32-bit, 64-bit) varies by microprocessor and affects how much data can be handled per operation.
- Registers fall into two broad categories: General Purpose Registers and Special Purpose Registers.
| Register | Category | Function |
|---|---|---|
| Accumulator (ACC) | Special purpose | Main register for arithmetic/logic operations; holds one operand and later the result |
| General Purpose Registers | General purpose | Temporary data storage during execution; some can pair up to hold 16-bit addresses/data |
| Program Counter (PC) | Special purpose | Holds the address of the next instruction to be fetched |
| Stack Pointer (SP) | Special purpose | Holds the address of the top of the stack, used for calls, interrupts, temporary storage |
| Instruction Register (IR) | Special purpose | Holds the instruction currently being decoded/executed |
| Memory Address Register (MAR) | Special purpose | Holds the address of the memory location to be accessed |
| Memory Data/Buffer Register (MDR/MBR) | Special purpose | Temporarily holds data being transferred to or from memory |
| Flag/Status Register | Special purpose | Holds status flags (Carry, Zero, Sign, Parity, Auxiliary Carry, Overflow) reflecting the last ALU result |
Let's Break It Down
Picture writing a math exam. The scratch space right on your exam paper is your registers — instant to use, always in front of you. Your textbook sitting in your bag is main memory — it has far more information, but you have to stop, unzip the bag, and flip pages to get anything from it. A smart CPU, like a smart student, keeps whatever it's actively working on in the "scratch space" for speed.
Common Mistake
Students often assume PC holds the instruction currently executing. It doesn't — PC only holds the address of the next instruction. The instruction actually being decoded/executed sits in the IR.
Test Yourself
- Which register would you check to know whether the last arithmetic result was negative?
- Why can't PC and IR be merged into one register?
Answers: 1) The Flag/Status Register (Sign flag).
2) PC must already point to the next instruction while IR still holds the current one being executed — merging them would overwrite the instruction being processed before execution finishes.
Summary
- Registers are fast, on-chip storage used during instruction execution.
- General purpose registers hold working data; special purpose registers (PC, SP, IR, MAR, MDR, Flags) have dedicated roles.
- PC points to the next instruction; IR holds the current one.
One-Liner Revision
Registers are the CPU's internal scratchpad, split into general-purpose (data) and special-purpose (control/status) types.
1.3 Arithmetic and Logic Unit (ALU)
Core Definition
The Arithmetic and Logic Unit (ALU) is the functional unit within the microprocessor responsible for performing all arithmetic operations (addition, subtraction, increment, decrement) and logical operations (AND, OR, NOT, XOR, comparison, shift, rotate) on binary data.
The ALU is basically the calculator part of the CPU. Whenever the processor needs to add two numbers, compare two values, or flip some bits, this is the unit actually doing the work.
Detailed Explanation
How data flows through the ALU during an operation:
- ALU receives operands mainly from the accumulator and/or general purpose registers (builds on 1.2 Registers).
- → Control unit sends the control signals that tell ALU exactly which operation to perform, based on the current instruction.
- → ALU carries out the operation on the given operand(s).
- → Result is placed back into the accumulator (or a destination register).
- → ALU simultaneously updates the Flag Register (Zero, Carry, Sign, Parity, Auxiliary Carry, Overflow) to record the status of that result.
These flags matter beyond just this instruction: later conditional instructions (jump-if-zero, jump-if-carry, etc.) read them to decide program flow — this is why ALU and Control Unit (1.4) are so tightly linked.
| Operation Type | Examples | Typical Use |
|---|---|---|
| Arithmetic | ADD, SUB, INC, DEC | Numeric calculation, counters, address computation |
| Logical | AND, OR, XOR, NOT, Compare, Shift, Rotate | Bit masking, testing conditions, data alignment |
Test Yourself
- After a subtraction produces a zero result, which flag gets set, and why does that matter for the next instruction?
- Which register typically supplies one operand to the ALU and also receives the final result?
Answers: 1) The Zero flag is set; a following conditional-jump instruction can now branch based on that flag without needing an extra comparison.
2) The Accumulator.
Summary
- ALU performs arithmetic and logical operations on binary data.
- Operands typically come from the accumulator/registers; results go back to the accumulator.
- Every ALU operation updates the flag register, which later instructions depend on.
One-Liner Revision
ALU = the unit that computes (arithmetic + logic) and sets flags describing the result.
1.4 Control and Timing (Control Unit)
Core Definition
The Control and Timing section (Control Unit) generates the sequence of timing and control signals required to fetch, decode, and execute instructions, thereby synchronizing the operation of the ALU, registers, memory, and I/O devices.
If the ALU is the muscle and registers are the memory pockets, the control unit is the manager giving orders. It tells every other part exactly when to read, when to write, and what to do next, all in step with the clock.
Detailed Explanation
Every instruction goes through the same basic cycle, driven entirely by the control unit:
- Fetch → Control unit places the address held in PC onto the address bus and activates the Memory Read control signal; the instruction travels back over the data bus into the Instruction Register (IR). PC is then incremented to point to the next instruction.
- Decode → Control unit interprets the opcode in IR to determine which operation is required and which registers or memory locations are involved.
- Execute → Control unit issues the specific control signals (to ALU, registers, memory, or I/O) that actually carry out the operation — e.g. telling ALU to add, or telling memory to accept a write.
- Store/Write-back (when needed) → The result is placed into the destination register or memory location.
This entire cycle repeats continuously and is paced by the clock signal (crystal oscillator); the clock's frequency (MHz/GHz) is what people usually mean by "processor speed." Each instruction cycle is further made up of one or more machine cycles (opcode fetch, memory read, memory write, I/O read, I/O write), and each machine cycle is made up of a number of T-states (individual clock periods) [verify — exact T-state counts are processor-specific and covered in later units].
Let's Break It Down
Imagine an orchestra performance. The ALU and registers are musicians who know how to play their parts, but without a conductor keeping time, they'd fall out of sync. The control unit is that conductor, the clock is the metronome, and every control signal is a cue telling a section exactly when to start playing and when to stop.
Test Yourself
- What happens during "decode" that does not happen during "fetch"?
- Why does the entire instruction cycle depend on the clock signal?
Answers: 1) Decode interprets the opcode already sitting in IR to figure out the operation and operands; fetch only brings the instruction in, it does not interpret it.
2) The clock provides the timing reference so every control signal is issued and every component reacts at the exact right moment, keeping fetch, decode, and execute synchronized across all units.
Summary
- Control unit generates the timing/control signals that drive fetch, decode, and execute.
- Instruction cycle: Fetch → Decode → Execute → (Store).
- The whole cycle is synchronized by the clock signal; machine cycles and T-states break it down further.
One-Liner Revision
Control unit = the conductor that sequences Fetch → Decode → Execute using clock-timed control signals.
1.5 System Buses: Address Bus, Data Bus, and Control Bus
Core Definition
A bus is a set of parallel conducting lines that carries address, data, or control signals between the microprocessor and other components like memory and I/O devices. Based on the information carried, a microprocessor system has three buses: Address Bus, Data Bus, and Control Bus.
Buses are the "roads" connecting the microprocessor to memory and I/O. One road is only for addresses (where to go), another is for data (what to carry), and a third carries the traffic signals telling everyone when to move.
Detailed Explanation
Address Bus
- Unidirectional — signals travel only from the microprocessor outward to memory/I/O.
- Carries the address of the memory location or I/O port the microprocessor wants to access.
- Its width (n lines) directly decides the maximum addressable memory: 2n locations. E.g., a 16-line address bus can address 216 = 65,536 (64K) locations [verify — illustrative example only].
Data Bus
- Bidirectional — data flows microprocessor → memory/I/O on a write, and memory/I/O → microprocessor on a read.
- Carries the actual data or instruction being transferred.
- Its width defines the processor's word size — how many bits it can move/process at once (8-bit, 16-bit, 32-bit, 64-bit).
Control Bus
- Carries the control and timing signals generated by the control unit (1.4) — e.g. Memory Read (MEMR), Memory Write (MEMW), I/O Read (IOR), I/O Write (IOW), Interrupt Request (INTR), Reset, Ready/Wait.
- Individual lines are typically unidirectional (some outputs from the microprocessor like RD/WR, some inputs to it like INTR/READY), but taken as a group, the control bus is considered bidirectional at system level [verify].
| Bus | Direction | Carries | Width Determines |
|---|---|---|---|
| Address Bus | Unidirectional | Memory/I/O address | Maximum addressable locations (2n) |
| Data Bus | Bidirectional | Actual data/instructions | Word size of the processor |
| Control Bus | Individual lines unidirectional; group-level bidirectional | Control/timing signals (RD, WR, INTR, etc.) | Range of control functions supported |
Memory Hook
Address = WHERE, Data = WHAT, Control = WHEN/HOW.
Common Mistake
Students often assume all buses are bidirectional. Only the data bus is inherently bidirectional; the address bus is strictly unidirectional, always flowing out from the microprocessor.
Test Yourself
- If a microprocessor has a 20-bit address bus, how many distinct memory locations can it access?
- Why must the data bus be bidirectional while the address bus is not?
Answers: 1) 220 = 1,048,576 locations (1 MB).
2) The microprocessor only ever generates addresses (it never "receives" one back), but it must both send data out (write) and receive data in (read), so data needs to travel in both directions.
Summary
- Three buses: Address (unidirectional, decides memory size), Data (bidirectional, decides word size), Control (carries timing/control signals).
- Address bus width n gives 2n addressable locations.
- This is one of the highest-yield topics in the unit — expect it directly in exams.
One-Liner Revision
Address bus says where, data bus carries what, control bus says when/how — and only data bus is truly bidirectional.
1.6 Microprocessor System with Bus Organization
Core Definition
A microprocessor-based (bus-organized) system is the complete architecture in which the microprocessor, memory (RAM/ROM), and I/O devices are interconnected through the common address bus, data bus, and control bus, enabling coordinated instruction execution and data transfer across the whole system.
On its own, a microprocessor chip can't do anything useful. Connect it to memory (to hold programs and data) and I/O devices (to talk to the outside world) using the three buses from 1.5, and you have a working computer system.
Detailed Explanation
This topic ties everything in the unit together: the control unit (1.4) generates addresses and control signals, registers (1.2) supply and receive data, and all of it travels between the microprocessor, memory, and I/O over the three buses (1.5).
+----------------+
| Microprocessor |
+----------------+
| | |
Address | Data | Control
Bus | Bus | Bus
| | |
+-----------------------+
| Memory | I/O |
| (RAM/ROM) | Devices |
+-----------------------+
Every device connected to the buses "listens" on the address bus, but only the device whose address matches actually responds; data transfer then happens on the data bus, timed and controlled by signals on the control bus.
Worked walkthrough — reading one byte from memory:
- CPU places the memory address (from a register such as the pair used to hold the address) onto the address bus.
- → CPU activates the Memory Read signal on the control bus.
- → Memory decodes the address on the address bus, locates the matching location.
- → Memory places the stored byte onto the data bus.
- → CPU reads that byte off the data bus into the destination register (e.g., the Accumulator).
Test Yourself
- In the walkthrough above, what would change if the CPU wanted to write to memory instead of reading from it?
- Why can multiple devices share the same physical buses without their signals conflicting?
Answers: 1) The CPU would activate the Memory Write signal instead of Memory Read, and the CPU itself would place data onto the data bus for memory to accept, reversing the data bus direction.
2) Because only the device whose address matches the value currently on the address bus is enabled to respond; every other device stays inactive (high-impedance/disconnected) at that moment.
Summary
- A complete system = microprocessor + memory + I/O, connected via the three buses.
- Address bus selects the device/location; control bus decides read or write; data bus carries the actual value.
- Address matching is what lets many devices safely share the same buses.
One-Liner Revision
Bus organization = microprocessor + memory + I/O wired together through address, data, and control buses.
1.7 Applications of Microprocessor
Core Definition
Because microprocessors are compact, low-cost, and programmable, they serve as the core control unit in an extremely wide range of digital systems, from personal computers to everyday embedded devices.
Detailed Explanation
- Computers → PCs, laptops, and servers use microprocessors as their CPU.
- Consumer electronics/embedded systems → washing machines, microwave ovens, air conditioners, digital cameras, televisions.
- Communication systems → mobile phones, modems, routers, and switching equipment.
- Industrial control and automation → process control, robotics, programmable logic controllers (PLCs).
- Automotive systems → engine control units (ECU), anti-lock braking systems (ABS), airbag control.
- Medical instrumentation → ECG machines, patient monitoring systems, diagnostic equipment.
- Business and point-of-sale systems → billing machines, ATMs, ticketing systems.
- Defense and aerospace → guidance and avionics systems [verify].
Summary
- Microprocessors are used almost anywhere digital control or computation is needed.
- Applications span computing, consumer electronics, communication, industry, automotive, medical, and business systems.
One-Liner Revision
Wherever compact, programmable control is needed — from PCs to washing machines to ECUs — a microprocessor is likely inside.
Whole Chapter Summary
- 1.1 Definition of Microprocessor: A single-chip CPU (ALU + control unit + registers) that executes stored instructions; needs external memory and I/O.
- 1.2 Registers: Fast internal storage; general-purpose registers hold data, special-purpose registers (PC, SP, IR, MAR, MDR, Flags) each have a dedicated role.
- 1.3 ALU: Performs arithmetic and logical operations, drawing operands from registers and updating the flag register with every result.
- 1.4 Control and Timing: Generates the signals that drive the Fetch → Decode → Execute cycle, synchronized by the clock.
- 1.5 System Buses: Address bus (unidirectional, decides memory size), Data bus (bidirectional, decides word size), Control bus (carries timing/control signals).
- 1.6 Microprocessor System with Bus Organization: Microprocessor, memory, and I/O connected via the three buses form the working system; address matching lets devices share buses safely.
- 1.7 Applications: Computers, consumer electronics, communication, industrial, automotive, medical, and business systems all rely on microprocessors.
Key Formulas and Points Sheet
| Rule/Formula | Meaning |
|---|---|
| Addressable locations = 2n | n = number of address bus lines; gives the maximum memory locations the microprocessor can access |
| Data bus width = word size | Number of bits the processor can transfer/process in one operation (8-bit, 16-bit, 32-bit, 64-bit) |
| Instruction Cycle | Fetch → Decode → Execute → (Store, if required), repeated for every instruction, timed by the clock |
Last-Minute Revision Sheet
- Microprocessor → single chip: ALU + Control Unit + Registers
- Registers → CPU's scratchpad; PC = next instruction address, IR = current instruction
- ALU → calculates + sets flags (Zero, Carry, Sign, Parity, AC, Overflow)
- Control Unit → conductor; drives Fetch → Decode → Execute, clock-timed
- Address Bus → WHERE, unidirectional, width n → 2n locations
- Data Bus → WHAT, bidirectional, width = word size
- Control Bus → WHEN/HOW, carries RD/WR/INTR-type signals
- Bus Organization → MP + Memory + I/O wired via 3 buses; address match = device selected
- Applications → PCs, embedded devices, communication, industrial, automotive, medical, business